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Faculty of Engineering and Computing
Infineon

Infineon Best Electronic and Computer Engineering Project at Final Year Projects Expo 2025

Infineon is a global leader in automotive semiconductors, power systems, and the Internet of Things (IoT), delivering innovative solutions that support green energy, clean mobility, and smart, secure technology. Its comprehensive portfolio spans sensors, microcontrollers, power semiconductors based on Si, SiC, and GaN, as well as advanced components for human-machine interaction and vehicle connectivity. The company also hosts one of its largest global customer-facing supply chain management teams at its Customer Logistics Management office in Dublin City, as well as having Research & Development Design Centres across Ireland.

The company awarded students the ‘Best Electronic and Computer Engineering Project’ at this year’s Expo. The two awardees were Patriks Vitols Jegurs for his innovative project ‘Parallelising LUT-Based Topological Thinning for Colon Centreline Extraction’ and Joseph O’Reilly for his fascinating project ‘Mitigating Privacy Risks in Retrieval-Augmented Generation (RAG) Systems.’

Patriks’ project investigates the parallelisation of a topological thinning algorithm for centreline extraction in virtual colonoscopy. Centreline extraction is a key step for navigating tubular structures in medical imaging, used for patient diagnosis. The project implements and accelerates an existing Lookup Table (LUT)-based thinning algorithm optimisation to improve computational efficiency. A region-growing segmentation algorithm is developed to extract the colon from volumetric CT data before thinning is applied. GPU acceleration using OpenCL is utilised to enhance performance. The project evaluates the speed, accuracy, and scalability of the parallel vs sequential implementations. Other contributions to the method are also examined in the project.

Joseph’s project addresses privacy challenges in Retrieval-Augmented Generation (RAG) systems, which enhance Large Language Models (LLMs) by retrieving external knowledge to generate accurate, contextually enriched responses. While RAG systems improve factual accuracy and reliability, they often process sensitive data, such as personal or proprietary information, which can lead to significant privacy vulnerabilities. This project develops a privacy-preserving pipeline that integrates Differential Privacy (DP) techniques with Low-Rank Adaptation (LoRA) to fine-tune a T5-small model. The goal is to generate synthetic query-document pairs that maintain semantic fidelity while minimising the risk of exposing sensitive information.

Thank you to Infineon for sponsoring this award, and congratulations to Patriks and Joseph for being awarded this amazing prize.

Read about the Expo 2025